Are We There Yet? A Study on the State of High-Level Synthesis
https://ieeexplore.ieee.org/document/8356004
Abstract:
To increase productivity in designing digital hardware components, high-level synthesis (HLS) is seen as the next step in raising the design abstraction level.
However, the quality of results (QoRs) of HLS tools has tended to be behind those of manual register transfer level (RTL) flows.
In this paper, we survey the scientific literature published since 2010 about the QoR and productivity differences between the HLS and RTL design flows.
Altogether, our survey spans 46 papers and 118 associated applications. Our results show that on average, the QoR of RTL flow is still better than that of the state-of-the-art HLS tools. However, the average development time with HLS tools is only a third of that of the RTL flow, and a designer obtains over four times as high productivity with HLS.
Based on our findings, we also present a model case study to sum up the best practices in comparative studies between HLS and RTL. The outcome of our case study is also in line with the survey results, as using an HLS tool is seen to increase the productivity by a factor of six. In addition, to help close the QoR gap, we present a survey of literature focused on improving HLS. Our results let us conclude that HLS is currently a viable option for fast prototyping and for designs with short time to market.
This blog's about HLS(High Level Synthesis) including SystemC and HDLs(VHDL, Verilog and SystemVerilog)
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2019년 7월 19일 금요일
2019년 4월 3일 수요일
Vivado High-Level Synthesis 튜토리얼
Vivado High-Level Synthesis 튜토리얼
(교재) Vivado Design Suite Tutorial: High-Level Synthesis(UG871)/Design File
[참고]
1. Vivado Design Hub - High-Level Synthesis (C based)
2. Getting started with Vivado High-Level-Synthesis
3. SystemC - Accellera Systems Initiative
4. Xilinx Vivado 2018.3
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(교재) Vivado Design Suite Tutorial: High-Level Synthesis(UG871)/Design File
[참고]
1. Vivado Design Hub - High-Level Synthesis (C based)
2. Getting started with Vivado High-Level-Synthesis
3. SystemC - Accellera Systems Initiative
4. Xilinx Vivado 2018.3
[읽을꺼리]
1. FPGAs Aid Search for Dark Energy with CHIME Telescope
2. The Search for Gravity Waves and Dark Energy Gets Help from FPGAs
3. Solar Orbiter Will Process Data Onboard Using Xilinx FPGAs
2019년 4월 2일 화요일
HLS blog open
This blog's about HLS(High Level Synthesis) including...
SystemC and HDLs(VHDL, Verilog and SystemVerilog)
SystemC and HDLs(VHDL, Verilog and SystemVerilog)
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